e037024.pdf

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SMALL CIRCUITSCOLLECTION
Seconds and Minutes Clocks
024
from DCF77
W. M. Köhler
1
+5V
+5V
R6
1M
+5V
(1/16mA)
Nowadays, the availability of inex-
+5V
14
16
R4
C8
C7
pensive receiver components
C3
IC1
IC2
100n
100µ
7
8
R12
makes it attractive to use the
16V
22n
+5V
D2
14
15
DCF77 signal at 77.5 kHz (trans-
RCX
CX
10
12
mitted from Mainflingen, Ger-
rot
≥1
T1
R1
9
many) for trivial applications. The
11
IC2.B
IC1.D
T2
R5
12
R10
R
11
circuit shown in
Figure 1
can rel-
220k
22k
&
13
13
+5V
atively easily extract seconds and
BC547B
BC547B
R7
minutes clocks from the DCF77
D1
C1
IC1.B
signal. As is well known, the 59th
5
4
&
green 100µ
6
second pulse is missing every
C5
16V
P1
+5V
100k
minute in the DCF77 signal, with
IC1.A
R2
R8
C4
22n
1
DCF
the missing pulse marking the
3
&
R13
2
1µ
minute. To obtain an uninter-
4
2
1
R3
rupted seconds clock, we must
RCX
CX
6
3
4
39k
first generate minutes pulses from
C6
≥1
2
7
5
C2
IC2.A
IC1.C
T3
these gaps and then derive the
1
R
8
R11
10
22n
R9
100n
3
&
22k
9
missing seconds pulses from the
minutes clock.
BC547B
IC1 = 4093
The circuit input is suitable for
IC2 = 4538
use with DCF77 receivers provid-
024006 - 12
+5V
ing negative output pulses. The
pin assignment of the receiver
adding an extra seconds pulse via the logical NOR gate.
corresponds to the Conrad Electronics HK 009 module; other
When the circuit is operating, the low-current LED driven by
modules may use different arrangements. After passing
T3 shows the ‘ticking’ of the DCF signal. The receiver is pow-
through a low-pass network that attenuates any residual
ered from the supply voltage via a series resistor. A (normal)
high-frequency components, the signal arrives at gate IC1a,
green LED (the colour is important) limits the voltage to
which is wired as an inverter and serves as an input buffer.
approximately 2.2 V. The current consumption of the circuit,
Following this gate, the signal branches to the two monosta-
excluding the DCF module, is very low at around 1 mA.
bles of IC2. IC2b is triggered by the positive edges of the 100-
(024006-1)
ms or 200-ms pulses of the DCF77 signal and generates 20-
ms pulses at a one-second rate. However, the 59
th
pulse is
still missing!
2
IC2a acts as a missing-pulse detector. This monostable
1.1 s
0.9 s
is also triggered by the positive edges of the DCF77
57
58
59
0
signal, but it is retriggerable. The period of this mono-
DCF
100/200 ms
stable is approximately 1100 ms. During the string of
seconds pulses, its pin-7 output remains low, but at
Q IC1.A
100/200 ms
th
pulse, it jumps high for
the time of the missing 59
around 1100 ms. IC1b detects the leading edge of this
Q IC2.B
20 ms
pulse and converts it into a 20-ms pulse that is added
to the seconds clock signal via logical NOR gate IC1d,
Q IC2.A
~
1,1 s
in order to provide the 59
th
pulse. IC1c detects the
trailing edge of the monostable pulse and generates a
Q IC1.B
20 ms
20-ms pulse, which is applied to output inverter T2 to
provide a minutes clock. If you find this all a bit diffi-
Q IC1.D
cult to follow, have a look at the timing diagram in
Fig-
20 ms
ure 2
(not drawn to scale).
Q IC1.C
In practice, the monostable period is adjusted so that
20 ms
with ‘normal’ seconds pulses, the circuit just avoids
2k7
180Ω
100k
120k
1M
1M
10k
10k
024006 - 11
Elektor Electronics
7-8/2003

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