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Rev. 1.0
Motorola Semiconductor Application Note
AN1227
Using 9346 Series Serial EEPROMs
with 6805 Series Microcontrollers
using
By William G. Grim
Abstract
This application note describes how the HC05 Family of microcontrollers
(MCU) can be used with 93 x 6 series serial electrically erasable
programmable read-only memories (EEPROMs). The MCUs are made
by various manufacturers such as National Semiconductor, SGS
Thompson, Catalyst, and Microchip. This series includes serial
EEPROMs whose base numbers are 9346, 9347, 9356, 9357, 9366,
9367, 32C101, and 33C102. These EEPROMs are based on a loose
standard; however, commands to initiate the basic functions are
identical. This application note also can be helpful using I
2
C EEPROMs
when they are used in conjunction with the Motorola application note
Interfacing the MC68HC05C5 SIOP to an I
2
C Peripheral
(AN1066/D) by
Naji Naufel.
© Motorola, Inc., 1997
AN1227 – Rev.1.0
Application Note
Introduction
Serial EEPROMs have become an inexpensive way to maintain small
amounts of non-volatile data in microcontroller systems during power off.
They commonly come in 1-K (128 x 8), 2-K (256 x 8), and 4-K (512 x 8)
sizes. Unlike flash memory chips, they do not take special voltages, but
on average they do require 4 milliseconds (ms) to execute each word-
write operation.
Several series of serial EEPROMs are available. This application note
describes a method to use 9346 series serial EEPROMs with HC05
Family microcontrollers. The 9346 series uses a serial 3-wire interface.
Along with chip select (CS), the three communications wires are clock
(CLK), data out (DO), and data in (DI).
In this application note, all seven basic 9346 commands are described
in
Table 2
and source code is included in
Appendix H, Appendix I,
and
Appendix J.
These seven commands are erase enable (EWEN), erase
disable (EWDS), write (WRITE), erase all (ERAL), write all (WRAL),
erase a memory location (ERASE), and read a memory location
(READ).
Different software algorithms that use serial EEPROMs are included.
The first method uses polling and ordinary input/output (I/O) lines. The
second method uses the serial peripheral interface (SPI) and polls it for
status. The third method also uses the SPI communications port, but
obtains status by using the SPI interrupt.
The first method of polling port pins requires four I/O lines; three of them
can be shared with other peripherals. Three memory locations are also
used. These locations can be shared by other tasks, also. This is a more
appropriate implementation when reading and writing the EEPROM
occurs infrequently or when a low-cost member of the HC05 Family is
used.
The second implementation differs from the first because it uses the SPI
and polls it for status. All of the bit shifting done in software in the first
application is done by the SPI hardware in the second method.
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Application Note
Available EEPROM Options
The third implementation uses the SPI and the SPI interrupt to save
processing time during WRITE. This is an appropriate approach when
writing occurs frequently or when the processor cannot be occupied in a
loop for the 4-ms interval required for each byte write.
Because differences exist among vendors, options to look for in 9346
series EEPROMs are described in the following section. The included
source code in
Appendix H, Appendix I,
and
Appendix J
contains
assembler switches to handle the various types of 9346 EEPROMs.
This application has been tested with EEPROMs made by Microchip,
National Semiconductor, SGS Thompson, and ICT. The test used an
M68HC05EVM evaluation module with an MC68HC705C8P
C8-resident processor that was assembled using the P&E assembler,
IASM05.
Available EEPROM Options
As of this writing, four base numbers of 9346 series EEPROMs exist
representing four different sizes. Most manufacturers also offer versions
that are autosequencing and autoerase. Packages typically are 8-pin
dual-in-line packages (DIPs) or small outline integrated circuits (SOICs).
The oldest member of the 93 x 6 series is the 9306 EEPROM, which is
not supported by this application note. The 9346 EEPROM has a 1-Kbit
capacity, the 9356 EEPROM has a 2-Kbit capacity, and the 9366
EEPROM has a 4-Kbit capacity. Minor differences exist in the
programming of these EEPROMs. The only direct replacement is a 9366
EEPROM for a 9356 EEPROM.
Older EEPROMs required erasure of each memory location before
rewriting. Those that do not require erasure are autoerase EEPROMs,
which can be programmed more quickly.
EEPROMs are now available in 3-volt versions and are ideal for
applications that require memory retention during battery changes.
Three-volt and 5-volt versions program in the same way.
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Application Note
Modes of EEPROM Operation
Serial EEPROMs have two formats and seven basic commands.
EEPROMs can operate in an 8- or 16-bit format. This format is
configured either by connecting the ORG pin to V
CC
for a 16-bit format
or by connecting the ORG pin to V
SS
for an 8-bit format. Another option
is to order the EEPROM from the factory preconfigured to the desired
format. In the latter case, the ORG pin is not used.
Table 1
describes the seven EEPROM commands: erase enable
(EWEN), erase disable (EWDS), write (WRITE), erase all (ERAL), write
all (WRAL), erase a memory location (ERASE), and read a memory
location (READ).
If an EEPROM is autosequencing, subsequent bits beyond the
addressed cell will be read as long as the EEPROM is selected and
clocks continue. EWEN, EWDS, and READ have no ready cycle. The
EEPROM is ready for a new command immediately after any of these
commands are executed. WRITE, WRAL, ERASE, and ERAL require
that the EEPROM is opened by an EWEN operation and not
subsequently closed by an EWDS operation. Although writing and
erasing commands are limited by the writing cycle time, the time taken
to read is limited only by microprocessor clock speed or the 1-MHz
maximum EEPROM clock speed.
Table 1. Serial EEPROM Commands
Commands
EWEN
EWDS
WRITE
WRAL
ERASE
ERAL
READ
Function
Erase write enable
Erase write disable
Writes a byte or word
Write all
Erases a location
Erase all
Reads addressed cell
Description
Opens the EEPROM for writing or erasure
Write protects the EEPROM (power-on default)
Writes a byte in 8-bit format or word in 16-bit format to a specific
memory location; this takes about 4 ms per word
Writes the same byte or word to all EEPROM locations; this
takes about 30 ms.
Erases the addressed memory location; this takes about 4 ms
Erases the entire EEPROM; this takes about 15 ms
Reads the addressed memory location
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Application Note
Hardware Description
Hardware Description
Two schematics,
Figure 1
and
Figure 2,
show the hardware
configurations used to test the attached source code in
Appendix H,
Appendix I,
and
Appendix J.
An MC68HC05EVM was used to test both
designs with an HC705C8P resident processor. Any Motorola MCU or
development system that can execute SPI code or I/O code can be used
to test the design.
Appendix H
(POL9346.asm) is used with
Figure 2.
Appendix I
and
Appendix J
(SPIP9346.asm and SPI9346.asm) are
used with
Figure 1.
The switch is for switching the EEPROM between 8- and 16-bit formats.
In actual applications, the switch is replaced by a hard wire jumper to
configure the EEPROM permanently for 8- or 16-bit operation.
In the polling application, ordinary I/O lines are used. Port A bit 0 and port
C bits 5 and 6 are outputs. Port C bit 7 is an input. When port A bit 0 is
low, the other ports are available for other services.
In the SPI application, the SPI is configured as a master. The SPI
handles all communications with the EEPROM. Port A bit 5 handles chip
select. When the EEPROM is not selected, the SPI is available for other
services.
Port A bit 4 is used to keep the SS line in its inactive high state.
AN1227 – Rev.1.0
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